ML Anthology

Wafer Scale Integration for Massively Parallel Memory-Based Reasoning

Hiroaki Kitano, Moritoshi Yasunaga
AAAI 1992 pp. 850-856
/aaai/1992/kitano1992aaai-wafer/
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Cite

Text

Kitano and Yasunaga. "Wafer Scale Integration for Massively Parallel Memory-Based Reasoning." AAAI Conference on Artificial Intelligence, 1992.

Markdown

[Kitano and Yasunaga. "Wafer Scale Integration for Massively Parallel Memory-Based Reasoning." AAAI Conference on Artificial Intelligence, 1992.](https://mlanthology.org/aaai/1992/kitano1992aaai-wafer/)

BibTeX

@inproceedings{kitano1992aaai-wafer,
  title     = {{Wafer Scale Integration for Massively Parallel Memory-Based Reasoning}},
  author    = {Kitano, Hiroaki and Yasunaga, Moritoshi},
  booktitle = {AAAI Conference on Artificial Intelligence},
  year      = {1992},
  pages     = {850-856},
  url       = {https://mlanthology.org/aaai/1992/kitano1992aaai-wafer/}
}