Implementation of Boolean and and or Logic Gates with Biologically Reasonable Time Constants in Spiking Neural Networks
Abstract
Latest developments in the field of power-efficient neural interface circuits provide an excellent platform for applications where power consumption is the primary concern. Developing neural networks to achieve pattern recognition on such hardware remains a daunting task owing to substantial computational complexity. We propose and demonstrate a Spiking Neural Network (SNN) with biologically reasonable time constants to implement basic Boolean Logic Gates. The same network can be further applied to more complex problem statements. We employ a frequency spike encoding for data representation in the model, and a simplified and computationally efficient model of a neuron with exponential synapses and Spike Timing Dependent Plasticity (STDP).
Cite
Text
Sahni et al. "Implementation of Boolean and and or Logic Gates with Biologically Reasonable Time Constants in Spiking Neural Networks." AAAI Conference on Artificial Intelligence, 2019. doi:10.1609/AAAI.V33I01.330110021Markdown
[Sahni et al. "Implementation of Boolean and and or Logic Gates with Biologically Reasonable Time Constants in Spiking Neural Networks." AAAI Conference on Artificial Intelligence, 2019.](https://mlanthology.org/aaai/2019/sahni2019aaai-implementation/) doi:10.1609/AAAI.V33I01.330110021BibTeX
@inproceedings{sahni2019aaai-implementation,
title = {{Implementation of Boolean and and or Logic Gates with Biologically Reasonable Time Constants in Spiking Neural Networks}},
author = {Sahni, Lakshay and Chakraborty, Debasrita and Ghosh, Ashish},
booktitle = {AAAI Conference on Artificial Intelligence},
year = {2019},
pages = {10021-10022},
doi = {10.1609/AAAI.V33I01.330110021},
url = {https://mlanthology.org/aaai/2019/sahni2019aaai-implementation/}
}