ML Anthology

Bit-Level Concurrency in Real-Time Geometric Feature Extractions

Wentai Liu, Tong-Fei Yeh, William E. Batchelor, Ralph K. Cavin Iii
CVPR 1988 pp. 957-962
doi:10.1109/CVPR.1988.196348 /cvpr/1988/liu1988cvpr-bit/

Abstract

An efficient mapping from a tree structure into a pipelined array of 2log N states is presented for processing an N*N image. In the proposed mapping structure the identification of the information growing property inherent in feature-extraction algorithms allows bit-level concurrency to be exploited in the architectural design. Accordingly, the design of each staged pipelined processor is simplified.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

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Cite

Text

Liu et al. "Bit-Level Concurrency in Real-Time Geometric Feature Extractions." IEEE/CVF Conference on Computer Vision and Pattern Recognition, 1988. doi:10.1109/CVPR.1988.196348

Markdown

[Liu et al. "Bit-Level Concurrency in Real-Time Geometric Feature Extractions." IEEE/CVF Conference on Computer Vision and Pattern Recognition, 1988.](https://mlanthology.org/cvpr/1988/liu1988cvpr-bit/) doi:10.1109/CVPR.1988.196348

BibTeX

@inproceedings{liu1988cvpr-bit,
  title     = {{Bit-Level Concurrency in Real-Time Geometric Feature Extractions}},
  author    = {Liu, Wentai and Yeh, Tong-Fei and Batchelor, William E. and Iii, Ralph K. Cavin},
  booktitle = {IEEE/CVF Conference on Computer Vision and Pattern Recognition},
  year      = {1988},
  pages     = {957-962},
  doi       = {10.1109/CVPR.1988.196348},
  url       = {https://mlanthology.org/cvpr/1988/liu1988cvpr-bit/}
}