ML Anthology

Image Computations on Reconfigurable VLSI Arrays

Russ Miller, V. K. Prasanna Kumar, Dionysios I. Reisis, Quentin F. Stout
CVPR 1988 pp. 925-930
doi:10.1109/CVPR.1988.196343 /cvpr/1988/miller1988cvpr-image/

Abstract

The authors consider image computations on a mesh with reconfigurable bus (reconfigurable mesh). The architecture consists of an array of processors overlaid with a reconfigurable bus system. The reconfiguration scheme can be used to dynamically obtain various interconnection patterns among the processor elements. The reconfiguration scheme supports several parallel techniques developed on the CRCW PRAM (concurrent read, concurrent write parallel random-access machine) model, leading to asymptotically superior solution times to image problems compared to those on the mesh with multiple broadcasting, the mesh with multiple buses, the mesh-of-trees, and the pyramid computer.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

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Cite

Text

Miller et al. "Image Computations on Reconfigurable VLSI Arrays." IEEE/CVF Conference on Computer Vision and Pattern Recognition, 1988. doi:10.1109/CVPR.1988.196343

Markdown

[Miller et al. "Image Computations on Reconfigurable VLSI Arrays." IEEE/CVF Conference on Computer Vision and Pattern Recognition, 1988.](https://mlanthology.org/cvpr/1988/miller1988cvpr-image/) doi:10.1109/CVPR.1988.196343

BibTeX

@inproceedings{miller1988cvpr-image,
  title     = {{Image Computations on Reconfigurable VLSI Arrays}},
  author    = {Miller, Russ and Kumar, V. K. Prasanna and Reisis, Dionysios I. and Stout, Quentin F.},
  booktitle = {IEEE/CVF Conference on Computer Vision and Pattern Recognition},
  year      = {1988},
  pages     = {925-930},
  doi       = {10.1109/CVPR.1988.196343},
  url       = {https://mlanthology.org/cvpr/1988/miller1988cvpr-image/}
}