ML Anthology

Real-Time 2-D Feature Detection on a Reconfigurable Computer

Arrigo Benedetti, Pietro Perona
CVPR 1998 pp. 586-593
doi:10.1109/CVPR.1998.698665 /cvpr/1998/benedetti1998cvpr-real/

Abstract

We have designed and implemented a system for real-time detection of 2-D features on a reconfigurable computer based on Field Programmable Gate Arrays (FPGA's). We envision this device as the front-end of a system able to track image features in real-time control applications like autonomous vehicle navigation. The algorithm employed to select good features is inspired by Tomasi and Kanade's method. Compared to the original method, the algorithm that we have devised does not require any floating point or transcendental operations, and can be implemented either in hardware or in software. Moreover, it maps efficiently into a highly pipelined architecture, well suited to implementation in FPGA technology. We have implemented the algorithm on a low-cost reconfigurable computer and have observed reliable operation on an image stream generated by a standard NTSC video camera at 30 Hz.

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Cite

Text

Benedetti and Perona. "Real-Time 2-D Feature Detection on a Reconfigurable Computer." IEEE/CVF Conference on Computer Vision and Pattern Recognition, 1998. doi:10.1109/CVPR.1998.698665

Markdown

[Benedetti and Perona. "Real-Time 2-D Feature Detection on a Reconfigurable Computer." IEEE/CVF Conference on Computer Vision and Pattern Recognition, 1998.](https://mlanthology.org/cvpr/1998/benedetti1998cvpr-real/) doi:10.1109/CVPR.1998.698665

BibTeX

@inproceedings{benedetti1998cvpr-real,
  title     = {{Real-Time 2-D Feature Detection on a Reconfigurable Computer}},
  author    = {Benedetti, Arrigo and Perona, Pietro},
  booktitle = {IEEE/CVF Conference on Computer Vision and Pattern Recognition},
  year      = {1998},
  pages     = {586-593},
  doi       = {10.1109/CVPR.1998.698665},
  url       = {https://mlanthology.org/cvpr/1998/benedetti1998cvpr-real/}
}