Development of a Face Recognition System on an Image Processing LSI Chip
Abstract
We present a real-time and high-precision face recognition system using an image processing LSI chip:Visconti[Visconti: Multi-VLIW Image Recognition Processor]. The system is compact and operates at low power, making it suitable for many purposes, including home security and robot vision. The LSI includes three media processing modules and peripherals which are suitable for machine vision. Face recognition is based on the constrained mutual sub-space method (CMSM), implemented on the LSI and optimized to make the best use of the hardware features. The optimization consists of four different levels: instruction, data, task and algorithm. It shows possible implementation of face recognition with multi-core CPUs or other LSI chips. Experimental results show the system operates at 20 frames/sec and a recognition rate is 99.59% when a threshold value is set to 0.55; performance comparable to that of a state-of-the-art system.
Cite
Text
Kozakaya and Nakai. "Development of a Face Recognition System on an Image Processing LSI Chip." IEEE/CVF Conference on Computer Vision and Pattern Recognition Workshops, 2004. doi:10.1109/CVPR.2004.322Markdown
[Kozakaya and Nakai. "Development of a Face Recognition System on an Image Processing LSI Chip." IEEE/CVF Conference on Computer Vision and Pattern Recognition Workshops, 2004.](https://mlanthology.org/cvprw/2004/kozakaya2004cvprw-development/) doi:10.1109/CVPR.2004.322BibTeX
@inproceedings{kozakaya2004cvprw-development,
title = {{Development of a Face Recognition System on an Image Processing LSI Chip}},
author = {Kozakaya, Tatsuo and Nakai, Hiroaki},
booktitle = {IEEE/CVF Conference on Computer Vision and Pattern Recognition Workshops},
year = {2004},
pages = {86},
doi = {10.1109/CVPR.2004.322},
url = {https://mlanthology.org/cvprw/2004/kozakaya2004cvprw-development/}
}