Reconfigurable Streaming Architectures for Embedded Smart Cameras
Abstract
Smart cameras using FPGAs require an automation method to simplify the design process and to ensure both computation and memory performance are met. Reconfigurable logic allows exploration of different hardware accelerators and memory-hierarchy configurations based on application needs. This paper presents a streaming architecture template that is generated from high level program descriptions. A smart camera development platform, the software architecture, and demonstration template are also described.
Cite
Text
Chai et al. "Reconfigurable Streaming Architectures for Embedded Smart Cameras." IEEE/CVF Conference on Computer Vision and Pattern Recognition Workshops, 2006. doi:10.1109/CVPRW.2006.167Markdown
[Chai et al. "Reconfigurable Streaming Architectures for Embedded Smart Cameras." IEEE/CVF Conference on Computer Vision and Pattern Recognition Workshops, 2006.](https://mlanthology.org/cvprw/2006/chai2006cvprw-reconfigurable/) doi:10.1109/CVPRW.2006.167BibTeX
@inproceedings{chai2006cvprw-reconfigurable,
title = {{Reconfigurable Streaming Architectures for Embedded Smart Cameras}},
author = {Chai, Sek M. and Bellas, Nikolaos and Kujawa, Greg and Ziomek, Tom and Dawson, Linda and Scaminaci, Tony and Dwyer, Malcolm and Linzmeier, Dan},
booktitle = {IEEE/CVF Conference on Computer Vision and Pattern Recognition Workshops},
year = {2006},
pages = {122},
doi = {10.1109/CVPRW.2006.167},
url = {https://mlanthology.org/cvprw/2006/chai2006cvprw-reconfigurable/}
}