FPGA-GPU Architecture for Kernel SVM Pedestrian Detection
Abstract
We present a real-time multi-sensor architecture for video-based pedestrian detection used within a road side unit for intersection assistance. The entire system is implemented on available PC hardware, combining a frame grabber board with embedded FPGA and a graphics card into a powerful processing network. Giving classification performance top priority, we use HOG descriptors with a Gaussian kernel support vector machine. In order to achieve real-time performance, we propose a hardware architecture that incorporates FPGA-based feature extraction and GPU-based classification. The FPGA-GPU pipeline is managed by a multi-core CPU that further performs sensor data fusion. Evaluation on the INRIA benchmark database and an experimental study on a real-world intersection using multi-spectral hypothesis generation confirm state-of-the-art classification and real-time performance.
Cite
Text
Bauer et al. "FPGA-GPU Architecture for Kernel SVM Pedestrian Detection." IEEE/CVF Conference on Computer Vision and Pattern Recognition Workshops, 2010. doi:10.1109/CVPRW.2010.5543772Markdown
[Bauer et al. "FPGA-GPU Architecture for Kernel SVM Pedestrian Detection." IEEE/CVF Conference on Computer Vision and Pattern Recognition Workshops, 2010.](https://mlanthology.org/cvprw/2010/bauer2010cvprw-fpgagpu/) doi:10.1109/CVPRW.2010.5543772BibTeX
@inproceedings{bauer2010cvprw-fpgagpu,
title = {{FPGA-GPU Architecture for Kernel SVM Pedestrian Detection}},
author = {Bauer, Sebastian and Köhler, Sebastian and Doll, Konrad and Brunsmann, Ulrich},
booktitle = {IEEE/CVF Conference on Computer Vision and Pattern Recognition Workshops},
year = {2010},
pages = {61-68},
doi = {10.1109/CVPRW.2010.5543772},
url = {https://mlanthology.org/cvprw/2010/bauer2010cvprw-fpgagpu/}
}