Implementation and Evaluation of FAST Corner Detection on the Massively Parallel Embedded Processor MX-G
Abstract
We implemented and evaluated the FAST corner detection algorithm on the MX-G, a system LSI device with a matrix-type massively parallel processor "MX core" developed by Renesas Electronics Corp. FAST corner detection is a very efficient feature detection algorithm. We developed a method to parallelize the FAST algorithm by using both the MX core and the SH-2A host CPU effectively. Our implementation achieved about five times faster performance than an implementation using only the host CPU. Experimental results show that the parallel FAST algorithm can detect corners from 512×512 monochrome images at video rates on an embedded processor.
Cite
Text
Moko et al. "Implementation and Evaluation of FAST Corner Detection on the Massively Parallel Embedded Processor MX-G." IEEE/CVF Conference on Computer Vision and Pattern Recognition Workshops, 2011. doi:10.1109/CVPRW.2011.5981839Markdown
[Moko et al. "Implementation and Evaluation of FAST Corner Detection on the Massively Parallel Embedded Processor MX-G." IEEE/CVF Conference on Computer Vision and Pattern Recognition Workshops, 2011.](https://mlanthology.org/cvprw/2011/moko2011cvprw-implementation/) doi:10.1109/CVPRW.2011.5981839BibTeX
@inproceedings{moko2011cvprw-implementation,
title = {{Implementation and Evaluation of FAST Corner Detection on the Massively Parallel Embedded Processor MX-G}},
author = {Moko, Yushi and Watanabe, Yoshihiro and Komuro, Takashi and Ishikawa, Masatoshi and Nakajima, Masami and Arimoto, Kazutami},
booktitle = {IEEE/CVF Conference on Computer Vision and Pattern Recognition Workshops},
year = {2011},
pages = {157-162},
doi = {10.1109/CVPRW.2011.5981839},
url = {https://mlanthology.org/cvprw/2011/moko2011cvprw-implementation/}
}