ML Anthology

A Floating Gate MOS Implementation of Resistive Fuse

Takashi Matsumoto, T. Sawaji, Takeyasu Sakai, H. Nagai
NeCo 1998 pp. 485-498
doi:10.1162/089976698300017854 /neco/1998/matsumoto1998neco-floating/

Abstract

Resistive fuses are key elements in weak string filters, which smooth out noise while detecting step edges inherent in original data. A resistive fuse is implemented by two pairs of floating-gate metal oxide semiconductor (MOS) transistors in a chip by a standard double poly complementary MOS process.

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Cite

Text

Matsumoto et al. "A Floating Gate MOS Implementation of Resistive Fuse." Neural Computation, 1998. doi:10.1162/089976698300017854

Markdown

[Matsumoto et al. "A Floating Gate MOS Implementation of Resistive Fuse." Neural Computation, 1998.](https://mlanthology.org/neco/1998/matsumoto1998neco-floating/) doi:10.1162/089976698300017854

BibTeX

@article{matsumoto1998neco-floating,
  title     = {{A Floating Gate MOS Implementation of Resistive Fuse}},
  author    = {Matsumoto, Takashi and Sawaji, T. and Sakai, Takeyasu and Nagai, H.},
  journal   = {Neural Computation},
  year      = {1998},
  pages     = {485-498},
  doi       = {10.1162/089976698300017854},
  volume    = {10},
  url       = {https://mlanthology.org/neco/1998/matsumoto1998neco-floating/}
}