Winner-Take-All Networks of O(N) Complexity
Abstract
We have designed, fabricated, and tested a series of compact CMOS integrated circuits that realize the winner-take-all function. These analog, continuous-time circuits use only O(n) of interconnect to perform this function. We have also modified the winner-take-all circuit, realizing a circuit that computes local nonlinear inhibition.
Cite
Text
Lazzaro et al. "Winner-Take-All Networks of O(N) Complexity." Neural Information Processing Systems, 1988.Markdown
[Lazzaro et al. "Winner-Take-All Networks of O(N) Complexity." Neural Information Processing Systems, 1988.](https://mlanthology.org/neurips/1988/lazzaro1988neurips-winnertakeall/)BibTeX
@inproceedings{lazzaro1988neurips-winnertakeall,
title = {{Winner-Take-All Networks of O(N) Complexity}},
author = {Lazzaro, J. and Ryckebusch, S. and Mahowald, M.A. and Mead, C. A.},
booktitle = {Neural Information Processing Systems},
year = {1988},
pages = {703-711},
url = {https://mlanthology.org/neurips/1988/lazzaro1988neurips-winnertakeall/}
}