Neuron-MOS Temporal Winner Search Hardware for Fully-Parallel Data Processing

Abstract

A unique architecture of winner search hardware has been de(cid:173) veloped using a novel neuron-like high functionality device called Neuron MOS transistor (or vMOS in short) [1,2] as a key circuit element. The circuits developed in this work can find the location of the maximum (or minimum) signal among a number of input data on the continuous-time basis, thus enabling real-time winner tracking as well as fully-parallel sorting of multiple input data. We have developed two circuit schemes. One is an ensemble of self(cid:173) loop-selecting v M OS ring oscillators finding the winner as an oscil(cid:173) lating node. The other is an ensemble of vMOS variable threshold inverters receiving a common ramp-voltage for competitive excita(cid:173) tion where data sorting is conducted through consecutive winner search actions. Test circuits were fabricated by a double-polysilicon CMOS process and their operation has been experimentally veri(cid:173) fied.

Cite

Text

Shibata et al. "Neuron-MOS Temporal Winner Search Hardware for Fully-Parallel Data Processing." Neural Information Processing Systems, 1995.

Markdown

[Shibata et al. "Neuron-MOS Temporal Winner Search Hardware for Fully-Parallel Data Processing." Neural Information Processing Systems, 1995.](https://mlanthology.org/neurips/1995/shibata1995neurips-neuronmos/)

BibTeX

@inproceedings{shibata1995neurips-neuronmos,
  title     = {{Neuron-MOS Temporal Winner Search Hardware for Fully-Parallel Data Processing}},
  author    = {Shibata, Tadashi and Nakai, Tsutomu and Morimoto, Tatsuo and Kaihara, Ryu and Yamashita, Takeo and Ohmi, Tadahiro},
  booktitle = {Neural Information Processing Systems},
  year      = {1995},
  pages     = {685-691},
  url       = {https://mlanthology.org/neurips/1995/shibata1995neurips-neuronmos/}
}