Dynamically Adaptable CMOS Winner-Take-All Neural Network
Abstract
The major problem that has prevented practical application of analog neuro-LSIs has been poor accuracy due to fluctuating analog device characteristics inherent in each device as a result of manufacturing. This paper proposes a dynamic control architecture that allows analog silicon neural networks to compensate for the fluctuating device characteristics and adapt to a change in input DC level. We have applied this architecture to compensate for input offset voltages of an analog CMOS WTA (Winner-Take-AlI) chip that we have fabricated. Experimental data show the effectiveness of the architecture.
Cite
Text
Iizuka et al. "Dynamically Adaptable CMOS Winner-Take-All Neural Network." Neural Information Processing Systems, 1996.Markdown
[Iizuka et al. "Dynamically Adaptable CMOS Winner-Take-All Neural Network." Neural Information Processing Systems, 1996.](https://mlanthology.org/neurips/1996/iizuka1996neurips-dynamically/)BibTeX
@inproceedings{iizuka1996neurips-dynamically,
title = {{Dynamically Adaptable CMOS Winner-Take-All Neural Network}},
author = {Iizuka, Kunihiko and Miyamoto, Masayuki and Matsui, Hirofumi},
booktitle = {Neural Information Processing Systems},
year = {1996},
pages = {713-719},
url = {https://mlanthology.org/neurips/1996/iizuka1996neurips-dynamically/}
}