A Mixed-Signal VLSI for Real-Time Generation of Edge-Based Image Vectors
Abstract
A mixed-signal image filtering VLSI has been developed aiming at real-time generation of edge-based image vectors for robust image recognition. A four-stage asynchronous median detection architec- ture based on analog digital mixed-signal circuits has been intro- duced to determine the threshold value of edge detection, the key processing parameter in vector generation. As a result, a fully seamless pipeline processing from threshold detection to edge fea- ture map generation has been established. A prototype chip was designed in a 0.35-µm double-polysilicon three-metal-layer CMOS technology and the concept was verified by the fabricated chip. The chip generates a 64-dimension feature vector from a 64x64-pixel gray scale image every 80µsec. This is about 104 times faster than the software computation, making a real-time image recognition system feasible.
Cite
Text
Yagi et al. "A Mixed-Signal VLSI for Real-Time Generation of Edge-Based Image Vectors." Neural Information Processing Systems, 2003.Markdown
[Yagi et al. "A Mixed-Signal VLSI for Real-Time Generation of Edge-Based Image Vectors." Neural Information Processing Systems, 2003.](https://mlanthology.org/neurips/2003/yagi2003neurips-mixedsignal/)BibTeX
@inproceedings{yagi2003neurips-mixedsignal,
title = {{A Mixed-Signal VLSI for Real-Time Generation of Edge-Based Image Vectors}},
author = {Yagi, Masakazu and Yamasaki, Hideo and Shibata, Tadashi},
booktitle = {Neural Information Processing Systems},
year = {2003},
pages = {1035-1042},
url = {https://mlanthology.org/neurips/2003/yagi2003neurips-mixedsignal/}
}