Sub-Microwatt Analog VLSI Support Vector Machine for Pattern Classification and Sequence Estimation
Abstract
An analog system-on-chip for kernel-based pattern classification and se- quence estimation is presented. State transition probabilities conditioned on input data are generated by an integrated support vector machine. Dot product based kernels and support vector coefficients are implemented in analog programmable floating gate translinear circuits, and probabil- ities are propagated and normalized using sub-threshold current-mode circuits. A 14-input, 24-state, and 720-support vector forward decod- ing kernel machine is integrated on a 3mm3mm chip in 0.5m CMOS technology. Experiments with the processor trained for speaker verifica- tion and phoneme sequence estimation demonstrate real-time recognition accuracy at par with floating-point software, at sub-microwatt power.
Cite
Text
Chakrabartty and Cauwenberghs. "Sub-Microwatt Analog VLSI Support Vector Machine for Pattern Classification and Sequence Estimation." Neural Information Processing Systems, 2004.Markdown
[Chakrabartty and Cauwenberghs. "Sub-Microwatt Analog VLSI Support Vector Machine for Pattern Classification and Sequence Estimation." Neural Information Processing Systems, 2004.](https://mlanthology.org/neurips/2004/chakrabartty2004neurips-submicrowatt/)BibTeX
@inproceedings{chakrabartty2004neurips-submicrowatt,
title = {{Sub-Microwatt Analog VLSI Support Vector Machine for Pattern Classification and Sequence Estimation}},
author = {Chakrabartty, Shantanu and Cauwenberghs, Gert},
booktitle = {Neural Information Processing Systems},
year = {2004},
pages = {249-256},
url = {https://mlanthology.org/neurips/2004/chakrabartty2004neurips-submicrowatt/}
}