The Cerebellum Chip: An Analog VLSI Implementation of a Cerebellar Model of Classical Conditioning
Abstract
We present a biophysically constrained cerebellar model of classical conditioning, implemented using a neuromorphic analog VLSI (aVLSI) chip. Like its biological counterpart, our cerebellar model is able to control adaptive behavior by predicting the precise timing of events. Here we describe the functionality of the chip and present its learning performance, as evaluated in simulated conditioning experiments at the circuit level and in behavioral experiments using a mobile robot. We show that this aVLSI model supports the acquisition and extinction of adaptively timed conditioned responses under real-world conditions with ultra-low power consumption.
Cite
Text
Hofstoetter et al. "The Cerebellum Chip: An Analog VLSI Implementation of a Cerebellar Model of Classical Conditioning." Neural Information Processing Systems, 2004.Markdown
[Hofstoetter et al. "The Cerebellum Chip: An Analog VLSI Implementation of a Cerebellar Model of Classical Conditioning." Neural Information Processing Systems, 2004.](https://mlanthology.org/neurips/2004/hofstoetter2004neurips-cerebellum/)BibTeX
@inproceedings{hofstoetter2004neurips-cerebellum,
title = {{The Cerebellum Chip: An Analog VLSI Implementation of a Cerebellar Model of Classical Conditioning}},
author = {Hofstoetter, Constanze and Gil, Manuel and Eng, Kynan and Indiveri, Giacomo and Mintz, Matti and Kramer, Jörg and Verschure, Paul F.},
booktitle = {Neural Information Processing Systems},
year = {2004},
pages = {577-584},
url = {https://mlanthology.org/neurips/2004/hofstoetter2004neurips-cerebellum/}
}