AER Building Blocks for Multi-Layer Multi-Chip Neuromorphic Vision Systems
Abstract
A 5-layer neuromorphic vision processor whose components communicate spike events asychronously using the address-event- representation (AER) is demonstrated. The system includes a retina chip, two convolution chips, a 2D winner-take-all chip, a delay line chip, a learning classifier chip, and a set of PCBs for computer interfacing and address space remappings. The components use a mixture of analog and digital computation and will learn to classify trajectories of a moving object. A complete experimental setup and measurements results are shown.
Cite
Text
Serrano-Gotarredona et al. "AER Building Blocks for Multi-Layer Multi-Chip Neuromorphic Vision Systems." Neural Information Processing Systems, 2005.Markdown
[Serrano-Gotarredona et al. "AER Building Blocks for Multi-Layer Multi-Chip Neuromorphic Vision Systems." Neural Information Processing Systems, 2005.](https://mlanthology.org/neurips/2005/serranogotarredona2005neurips-aer/)BibTeX
@inproceedings{serranogotarredona2005neurips-aer,
title = {{AER Building Blocks for Multi-Layer Multi-Chip Neuromorphic Vision Systems}},
author = {Serrano-Gotarredona, R. and Oster, M. and Lichtsteiner, P. and Linares-Barranco, A. and Paz-Vicente, R. and Gomez-Rodriguez, F. and Riis, H. Kolle and Delbruck, T. and Liu, S. C. and Zahnd, S. and Whatley, A. M. and Douglas, R. and Hafliger, P. and Jimenez-Moreno, G. and Civit, A. and Serrano-Gotarredona, T. and Acosta-Jimenez, A. and Linares-Barranco, B.},
booktitle = {Neural Information Processing Systems},
year = {2005},
pages = {1217-1224},
url = {https://mlanthology.org/neurips/2005/serranogotarredona2005neurips-aer/}
}