FALCON: An ML Framework for Fully Automated Layout-Constrained Analog Circuit Design

Abstract

Designing analog circuits from performance specifications is a complex, multi-stage process encompassing topology selection, parameter inference, and layout feasibility. We introduce FALCON, a unified machine learning framework that enables fully automated, specification-driven analog circuit synthesis through topology selection and layout-constrained optimization. Given a target performance, FALCON first selects an appropriate circuit topology using a performance-driven classifier guided by human design heuristics. Next, it employs a custom, edge-centric graph neural network trained to map circuit topology and parameters to performance, enabling gradient-based parameter inference through the learned forward model. This inference is guided by a differentiable layout cost, derived from analytical equations capturing parasitic and frequency-dependent effects, and constrained by design rules. We train and evaluate FALCON on a large-scale custom dataset of 1M analog mm-wave circuits, generated and simulated using Cadence Spectre across 20 expert-designed topologies. Through this evaluation, FALCON demonstrates >99\% accuracy in topology inference, <10\% relative error in performance prediction, and efficient layout-aware design that completes in under 1 second per instance. Together, these results position FALCON as a practical and extensible foundation model for end-to-end analog circuit design automation.

Cite

Text

Mehradfar et al. "FALCON: An ML Framework for Fully Automated Layout-Constrained Analog Circuit Design." Advances in Neural Information Processing Systems, 2025.

Markdown

[Mehradfar et al. "FALCON: An ML Framework for Fully Automated Layout-Constrained Analog Circuit Design." Advances in Neural Information Processing Systems, 2025.](https://mlanthology.org/neurips/2025/mehradfar2025neurips-falcon/)

BibTeX

@inproceedings{mehradfar2025neurips-falcon,
  title     = {{FALCON: An ML Framework for Fully Automated Layout-Constrained Analog Circuit Design}},
  author    = {Mehradfar, Asal and Zhao, Xuzhe and Huang, Yilun and Ceyani, Emir and Yang, Yankai and Han, Shihao and Aghasi, Hamidreza and Avestimehr, Salman},
  booktitle = {Advances in Neural Information Processing Systems},
  year      = {2025},
  url       = {https://mlanthology.org/neurips/2025/mehradfar2025neurips-falcon/}
}