Hyperspectral Compute-in-Memory: An Opto-Electronic Computing Architecture Enabling Compute Density Beyond PetaOPS/mm$^2$

Abstract

We present a hyperspectral compute-in-memory architecture that utilizes both frequency and spatial dimensions for single-shot matrix-matrix multiplication. This approach offers exceptional parallelism, scalability, programmability, and efficient chip area utilization, potentially enabling a compute density exceeding PetaOPS/mm$^2$. The architecture demonstrates potential for energy-efficient, three-dimensional opto-electronic computing in future data center applications.

PDF NeurIPSW OpenReview Semantic Scholar

Cite

Text

Suh et al. "Hyperspectral Compute-in-Memory: An Opto-Electronic Computing Architecture Enabling Compute Density Beyond PetaOPS/mm$^2$." NeurIPS 2024 Workshops: MLNCP, 2024.

Markdown

[Suh et al. "Hyperspectral Compute-in-Memory: An Opto-Electronic Computing Architecture Enabling Compute Density Beyond PetaOPS/mm$^2$." NeurIPS 2024 Workshops: MLNCP, 2024.](https://mlanthology.org/neuripsw/2024/suh2024neuripsw-hyperspectral/)

BibTeX

@inproceedings{suh2024neuripsw-hyperspectral,
  title     = {{Hyperspectral Compute-in-Memory: An Opto-Electronic Computing Architecture Enabling Compute Density Beyond PetaOPS/mm$^2$}},
  author    = {Suh, Myoung-Gyun and Park, ByoungJun and Latifpour, Mostafa Honari and Yamamoto, Yoshihisa},
  booktitle = {NeurIPS 2024 Workshops: MLNCP},
  year      = {2024},
  url       = {https://mlanthology.org/neuripsw/2024/suh2024neuripsw-hyperspectral/}
}